View IDT74FCT543C_345973.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS OCTAL LATCHED TRANSCEIVER
FEATURES:
* * * *
IDT54/74FCT543/A/C
* * * * * * * * *
IDT54FCT543 equivalent to FASTTM speed IDT54/74FCT543A up to 25% faster than FAST IDT74FCT543C up to 40% faster than FAST Eqivalent to FAST output drive over full temperature and voltage supply extremes IOL = 64mA (commercial) and 48mA (military) Separate controls for data flow in each direction Back-to-back latches for storage CMOS power levels (1mW typ. static) Substantially lower input current levels than FAST (5A max.) TTL input and output level compatible CMOS output level compatible MIlitary product compliant to MIL-STD-883, Class B Available in the following packages: - Commercial: SOIC - Military: CERDIP, LCC
The FCT543 is a non-inverting octal transceiver built using an advanced dual metal CMOS technology. These devices contain two sets of eight Dtype latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (CEAB) input must be low in order to enter data from A0-A7 or to take data from B0-B7, as indicated in the Function Table. With CEAB low, a low signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent low-to-high transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB and OEAB both low, the 3-state B output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses the CEBA, LEBA and OEBA inputs.
DESCRIPTION:
FUNCTIONAL BLOCK DIAGRAM
DETAIL A D LE A0
3
Q
22 B0
Q
D LE
A1 A2 A3 A4 A5 A6 A7
4 5 6 7 8 9 10
21 B1 20 B2 19
B3
DETAIL A x 7
18 B4 17
B5 B6 15 B7
16
OEBA CEBA LEBA
2 13 23 1 11 14
OEAB
CEAB LEAB
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
AUGUST 2003
DSC-4602/7
(c) 2003 Integrated Device Technology, Inc.
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
OEBA NC A0 B0
26 25 24 23 22 21 20 19 18
INDEX
OEBA A0 A1 A2 A3 A4 A5 A6 A7 CEAB GND
2 3 4 5 6 7 8 9 10 11 12
23 22 21 20 19 18 17 16 15 14 13
CEBA B0 B1 B2 B3 B4 B5 B6 B7 LEAB OEAB
4 3 2 28 1 27
Vcc
LEBA
1
24
VCC
LEBA
CEBA
A1 A2 A3 NC A4 A5 A6
5 6 7 8 9 10 11 12 13 14
B1 B2 B3 NC B4 B5 B6
15
16
17
CEAB
OEAB
LEAB
NC
A7
CERDIP/ SOIC TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM(2) VTERM(3) TA TBIAS TSTG PT IOUT Rating Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Operating Temperature Temperature under BIAS Storage Temperature Power Dissipation DC Output Current 0 to +70 -55 to +125 -55 to +125 0.5 120 -55 to +125 -65 to +135 -65 to +150 0.5 120 C C C W mA -0.5 to VCC -0.5 to VCC V Commercial -0.5 to +7 Military -0.5 to +7 Unit V
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF pF
NOTE: 1. This parameter is measured at characterization but not tested.
LOGIC SYMBOL
LEAB CEAB CEBA LEBA A0 A1 A2 A3 A4 A5 A6 A7 OEBA B0 B1 B2 B3 B4 B5 B6 B7 OEAB
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Input and Vcc terminals only. 3. Output and I/O terminals only.
2
GND
LCC TOP VIEW
B7
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names OEAB OEBA CEAB CEBA LEAB LEBA A0-A7 B0-B7 Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs
FUNCTION TABLE(1, 2)
Inputs LEAB X H X L H
For A-to-B (Symmetric with B-to-A)
CEAB H X X L L OEAB X X H L L Latch Status A-to-B Storing Storing X Transparent Storing Output Buffers B0-B7 High Z X High Z Current A Inputs Previous* A Inputs
NOTES: 1. * Before LEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care 2. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA and OEBA.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V Commercial: TA = 0C to +70C, VCC = 5.0V 5%, Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL IIH IIL IOZH IOZL VIK IOS VOH Off State (High Impedance) Output Current Clamp Diode Voltage Short Circuit Current Output HIGH Voltage VCC = Max. Parameter Input HIGH Level Input LOW Level Input HIGH Current VCC = Max. Input LOW Current Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VI = VCC VI = 2.7V VI = 0.5V VI = GND VO = VCC VO = 2.7V VO = 0.5V VO = GND GND(3) Min. 2 -- -- -- -- -- -- -- -- -- -- -60 VHC VHC 2.4 2.4 -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -- -- -- -0.7 -120 VCC VCC 4.3 4.3 GND GND 0.3 0.3 Max. -- 0.8 5 5(4) -5(4) -5 10 10(4) -10(4) -10 -1.2 -- -- -- -- -- VLC VLC(4) 0.55 0.55 A A Unit V V
VCC = Min., IIN = -18mA VCC = Max., VO = VCC = 3V, VIN = VLC or VHC, IOH = -32A VCC = Min IOH = -300A VIN = VIH or VIL IOH = -12mA MIL IOH = -15mA COM'L VCC = 3V, VIN = VLC or VHC, IOL = 300A VCC = Min IOL = 300A VIN = VIH or VIL IOL = 48mA MIL IOL = 64mA COM'L
V mA V
VOL
Output LOW Voltage
V
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not ttested.
3
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC - 0.2V
Symbol ICC ICC ICCD Parameter Quiescent Power Supply Current Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN VHC; VIN VLC VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open CEAB and OEAB = GND CEBA = VCC One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = VCC One Bit Toggling at fi = 5MHz VCC = Max. Outputs Open fCP = 10MHz (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = VCC Eight Bits Toggling at fi = 5MHz VIN VHC VIN VLC Min. -- -- -- Typ.(2) 0.2 0.5 0.15 Max. 1.5 2 0.25 Unit mA mA mA/ MHz
IC
Total Power Supply Current(6)
VIN VHC VIN VLC (FCT) VIN = 3.4V VIN = GND
--
1.7
4
mA
--
2.2
6
VIN VHC VIN VLC (FCT) VIN = 3.4V VIN = GND
--
7
12.8(5)
--
9.2
21.8(5)
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2+ fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Output Frequency Ni = Number of Outputs at fi All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
54FCT543 Mil. Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW Parameter Propagation Delay Transparant Mode Ax to Bx or Bx to Ax Propagation Delay LEBA to Ax, LEAB to Bx Output Enable Time OEBA or OEAB to Ax or Bx CEBA or CEAB to Ax or Bx Output Disable Time OEBA or OEAB to Ax or Bx CEBA or CEAB to Ax or Bx Set-up Time, HIGH or LOW Ax or Bx to LEBA or LEAB Hold Time, HIGH or LOW Ax or Bx to LEBA or LEAB LEBA or LEAB Pulse Width LOW 5 -- 5 -- 5 -- 5 -- ns
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays.
54/74FCT543A Com'l. Mil. Min.(2) 2.5 7.5 Min.(2) 2.5 Max. 6.5
74FCT543C Com'l. Unit ns 2.5 5.3 Max. Min.(2) Max.
Condition(1) CL = 50pF RL = 500
Min.(2) 2.5
Max. 10
2.5 2
14 14
2.5 2
8 9
2.5 2
9 10
2.5 2
7 8
ns ns
2
13
2
7.5
2
8.5
2
6.5
ns
3 2
-- --
2 2
-- --
2 2
-- --
2 2
-- --
ns ns
5
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
V CC 500 VIN Pulse Generator RT D.U.T . VOUT 7.0V
SWITCH POSITION
Test Open Drain Disable Low Enable Low Switch Closed Open
50pF CL
500
All Other Tests
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC.
tSU
tH
tREM
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
Octal link
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
Octal link
1.5V
1.5V
tSU
tH
Pulse Width
Set-Up, Hold, and Release Times
ENABLE SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V
Octal link
DISABLE 3V 1.5V 0V 3.5V 0.3V tPHZ 0.3V 1.5V 0V VOH 0V
Octal link
CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 3.5V 1.5V tPLZ
VOL
Propagation Delay
Enable and Disable Times
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; ZO 50; tF 2.5ns; tR 2.5ns.
6
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
XXXX IDT XX FCT Temp. Range Device Type XX Package X Process Blank B Commercial MIL-STD-883, Class B Commercial Options Small Outline IC Military Options CERDIP Leadless Chip Carrier
SO D L
543 543A 543C
Fast CMOS Octal Latched Transceiver
54 74
- 55C to +125C 0C to +70C
CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054
for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com
for Tech Support: logichelp@idt.com (408) 654-6459
7

▲Up To Search▲

Price & Availability of IDT74FCT543C

	To Download IDT74FCT543C Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .